1. Field of the Invention
The present invention relates, in general, to integrated circuits and, more particularly, to integrated circuits having voltage regulator circuits generating an internal power supply voltage from an external power supply voltage.
2. Relevant Background
Integrated circuits (ICs) comprise thousands or millions of individual devices interconnected to provide desired functionality. Significant effort is expended to improve processing techniques so as to reduce the size of each individual device in order to provide greater functionality on a given IC chip at reduced cost. In general, smaller geometry devices operate faster while dissipating less power than do larger geometry devices. As device geometries are reduced the breakdown voltages of the devices and the isolation that separates the devices decreases also.
Electronic systems usually comprise ICs manufactured with a variety of technologies. This has created a need for multiple power supply voltages to be supplied to a single printed circuit board to support the various types of devices on that board. For example, devices are available that require a power supply voltages ranging from 5.0 volts to 2.5 volts. A practical solution to this disparity is to provide voltage down converter circuitry that decreases the higher voltage (e.g., 5.0 V in the above example) to the lower voltage required internally by the small geometry device (e.g., 3.3 V or 2.5 V). Hence, it is necessary to regulate the available external power supply voltage to provide voltages consistent with that required internally by each of the small geometry ICs.
To limit undesirable volt age droop on the internal voltage supply node during high current loads, a large capacitor is coupled between the internal voltage supply nod e and ground. In practice, however, filter capacitors consume a great deal of area without adding functionality. Cost and circuit size considerations dictate limiting the filter capacitor to more modest sizes. Hence, it is desirable to minimize voltage ripple in ways that do not require large filter capacitors.
A conventional voltage down converter (also called regulators and DC/DC converters) is designed to generate a lower voltage than the available supply voltage In a linear regulator, a transistor is coupled in series between the external voltage supply node and the internal voltage supply node. The conductivity of the transistor is modulated to drop the excess voltage across the transistor. Linear regulators have many desirable characteristics such as simplicity, low output ripple, high quality line and load regulation, and fast recovery time. However, linear regulators are inefficient resulting in wasted power and excess heat generation.
Pulse width modulation (PWM) regulators are becoming more common because of their higher efficiency. A PWM down converter compares the voltage on the internal voltage supply node to a reference voltage to generate a PWM signal that is on (i.e., a logic high) when the internal supply voltage is too low, and off (i.e., a logic low) when the internal supply voltage is too high. The PWM signal controls the transistor coupled in series between the external voltage node and the internal voltage supply node. The series transistor operates primarily in either the on or off state where power losses are smallest (as compared to the linear region where power loss is greater).
The comparator used in conventional PWM regulators to compare the reference voltage to the internal supply voltage has a time delay before its outputs react to a change in the internal supply voltage. This delay is manifested as drooping and overshoot in the internal supply voltage, particularly under high current loads. In a memory device, for example, thousands of sense amplifiers are activated simultaneously creating periodic high current loads. This is complicated in light of a trend towards smaller transistors in the voltage down converter as well as smaller filter capacitors. Moreover, as more memory cells are placed on a single integrated circuit the interconnect lines become smaller, more resistive, and greater in number all of which lead to greater demand on the circuitry generating the internal supply voltage.
A technique used to minimize voltage droop in external (i.e., off-chip) down converters employs a hysteretic comparator to compare the converter output voltage to a reference voltage. However, it is difficult to generate accurate hysteresis using off-chip components that do not have direct access to the internal voltage supply levels that must be regulated. Although this limitation can be overcome by bringing the internal supply voltage out to a pin of the IC, this solution degrades the system's noise performance as well as raises the cost to manufacture the device. Moreover, the load capacitance created by the pins is significant making the design more complex in addition to degrading the overall performance device. A need exists for a voltage down converter that can be implemented on-chip with improved resistance to droop and overshoot in high load applications.